Development of a fully designed alarm clock implemented on the Xilinx Spartan3 board.

Project Activity

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Categories

Hardware, Simulation, Sound Synthesis, Alarm Clocks

License

Academic Free License (AFL)

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Additional Project Details

Operating Systems

Windows

Languages

French

Intended Audience

Advanced End Users

User Interface

Win32 (MS Windows)

Programming Language

VHDL/Verilog

Related Categories

VHDL/Verilog Hardware Platform, VHDL/Verilog Simulation Software, VHDL/Verilog Sound Synthesis Software, VHDL/Verilog Alarm Clocks

Registered

2009-11-10
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